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 FeaTures
n n n n n n n n n n n n n n n n n
LTM2881 Complete Isolated RS485/RS422 Module Transceiver + Power DescripTion
The LTM(R)2881 is a complete galvanically isolated fullduplex RS485/RS422 Module(R) transceiver. No external components are required. A single supply powers both sides of the interface through an integrated, isolated, low noise, efficient 5V output DC/DC converter. Coupled inductors and an isolation power transformer provide 2500VRMS of isolation between the line transceiver and the logic interface. This device is ideal for systems where the ground loop is broken allowing for large common mode voltage variation. Uninterrupted communication is guaranteed for common mode transients greater than 30kV/s. Maximum data rates are 20Mbps or 250kbps in slew limited mode. Transmit data, DI and receive data, RO, are implemented with event driven low jitter processing. The receiver has a one-eighth unit load supporting up to 256 nodes per bus. A logic supply pin allows easy interfacing with different logic levels from 1.62V to 5.5V, independent of the main supply. Enhanced ESD protection allows this part to withstand up to 15kV (human body model) on the transceiver interface pins to isolated supplies and 10kV through the isolation barrier to logic supplies without latch-up or damage.
L, LT, LTC, LTM, Linear Technology, Module and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
Isolated RS485/RS422 Transceiver: 2500VRMS Isolated DC Power: 5V at Up to 200mA No External Components Required 20Mbps or Low EMI 250kbps Data Rate High ESD: 15kV HBM on Transceiver Interface High Common Mode Transient Immunity: 30kV/s Integrated Selectable 120 Termination 3.3V (LTM2881-3) or 5.0V (LTM2881-5) Operation 1.62V to 5.5V Logic Supply Pin for Flexible Digital Interface Common Mode Working Voltage: 560VPEAK High Input Impedance Failsafe RS485 Receiver Current Limited Drivers and Thermal Shutdown Compatible with TIA/EIA-485-A Specification High Impedance Output During Internal Fault Condition Low Current Shutdown Mode (< 10A) General Purpose CMOS Isolated Channel Small, Low Profile (15mm x 11.25mm x 2.8mm) Surface Mount BGA and LGA Packages
applicaTions
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Isolated RS485/RS422 Interface Industrial Networks Breaking RS485 Ground Loops
Typical applicaTion
Isolated Half-Duplex RS485 Module Transceiver
3.3V VCC ISOLATION BARRIER VL RO RE TE DE DI GND LTM2881 VCC2 A B TWISTED-PAIR CABLE Y Z GND2
2881 TA01
LTM2881 Operating Through 35kV/s CM Transients
MULTIPLE SWEEPS OF COMMON MODE TRANSIENTS 500V/DIV
PWR
5V
AVAILABLE CURRENT: 150mA (LTM2881-5) 100mA (LTM2881-3)
DI 1V/DIV 1V/DIV
RO
50ns/DIV
2881 TA01a
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LTM2881 absoluTe MaxiMuM raTings
(Note 1)
pin conFiguraTion
TOP VIEW 1 A B C D E F G H J K L DIN SLO Y Z B A VCC2 BGA PACKAGE 32-PIN (15mm 11.25mm 3.42mm) TJMAX = 125C, JA = 32.2C/W, JCTOP = 27.2C/W, JCBOTTOM = 20.9C/W, JB = 26.4C/W, WEIGHT = 1g LGA PACKAGE 32-PIN (15mm 11.25mm 2.8mm) TJMAX = 125C, JA = 31.1C/W, JCTOP = 27.3C/W, JCBOTTOM = 19.5C/W, JB = 25.1C/W, WEIGHT = 1g GND2 GND VCC 2 3 4 5 6 7 8 DOUT TE DI DE RE RO VL ON
VCC to GND .................................................. -0.3V to 6V VCC2 to GND2............................................... -0.3V to 6V VL to GND .................................................... -0.3V to 6V Interface Voltages (A, B, Y, Z) to GND2 ........................ VCC2 -15V to 15V Signal Voltages ON, RO, DI, DE, RE, TE, DOUT to GND......................... -0.3V to VL +0.3V Signal Voltages SLO, DIN to GND2 ....................................-0.3V to VCC2 +0.3V Operating Temperature Range LTM2881C ............................................... 0C to 70C LTM2881I.............................................-40C to 85C Storage Temperature Range .................. -55C to 125C Peak Reflow Temperature (Soldering, 10 sec)....... 245C
orDer inForMaTion
LEAD FREE FINISH LTM2881CY-3#PBF LTM2881IY-3#PBF LTM2881CY-5#PBF LTM2881IY-5#PBF LTM2881CV-3#PBF LTM2881IV-3#PBF LTM2881CV-5#PBF LTM2881IV-5#PBF TRAY LTM2881CY-3#PBF LTM2881IY-3#PBF LTM2881CY-5#PBF LTM2881IY-5#PBF LTM2881CV-3#PBF LTM2881IV-3#PBF LTM2881CV-5#PBF LTM2881IV-5#PBF PART MARKING* LTM2881Y-3 LTM2881Y-3 LTM2881Y-5 LTM2881Y-5 LTM2881V-3 LTM2881V-3 LTM2881V-5 LTM2881V-5 PACKAGE DESCRIPTION 32-Pin (15mm x 11.25mm x 3.42mm) BGA 32-Pin (15mm x 11.25mm x 3.42mm) BGA 32-Pin (15mm x 11.25mm x 3.42mm) BGA 32-Pin (15mm x 11.25mm x 3.42mm) BGA 32-Pin (15mm x 11.25mm x 2.8mm) LGA 32-Pin (15mm x 11.25mm x 2.8mm) LGA 32-Pin (15mm x 11.25mm x 2.8mm) LGA 32-Pin (15mm x 11.25mm x 2.8mm) LGA TEMPERATURE RANGE 0C to 70C -40C to 85C 0C to 70C -40C to 85C 0C to 70C -40C to 85C 0C to 70C -40C to 85C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
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LTM2881
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. LTM2881-3 VCC = 3.3V, LTM2881-5 VCC = 5.0V, VL = 3.3V, GND = GND2 = 0V, ON = VL unless otherwise noted.
SYMBOL Power Supply VCC VL ICCPOFF ICCS VCC2 VCC2NOLOAD ICC2S Driver |VOD| |VOD| VOC |VOC| IOZD IOSD Receiver RIN RTE IIN Receiver Input Resistance Receiver Termination Resistance Enabled Receiver Input Current (A, B) RE = 0V or VL , VIN = -7V, -3V, 3V, 7V, 12V (Figure 3) TE = VL , VAB = 2V, VB = - 7V, 0V, 10V (Figure 8) ON = 0V VCC2 = 0V or 5V, VIN = 12V (Figure 3) ON = 0V VCC2 = 0V or 5V, VIN = -7V (Figure 3) VTH VTH Logic VIL VIH Logic Input High Voltage Logic Input Low Voltage 1.62V VL 5.5V DIN SLO DI, TE, DE, ON, RE: VL 2.35V 1.62V VL < 2.35V
l l l l l l l l l l
elecTrical characTerisTics
PARAMETER VCC Supply Voltage VL Supply Voltage VCC Supply Current in Off Mode VCC Supply Current in On Mode Regulated VCC2 Output Voltage, Loaded Regulated VCC2 Output Voltage, No Load Efficiency VCC2 Short-Circuit Current Differential Driver Output Voltage
CONDITIONS LTM2881-3 LTM2881-5 ON = 0V LTM2881-3 DE = 0V, RE = VL , No Load LTM2881-5 DE = 0V, RE = VL , No Load LTM2881-3 DE = 0V, RE = VL, ILOAD = 100mA LTM2881-5 DE = 0V, RE = VL, ILOAD = 150mA DE = 0V, RE = VL , No Load ICC2 = 100mA, LTM2881-5 (Note 2) DE = 0V, RE = VL , VCC2 = 0V R = (Figure 1) R = 27 (RS485) (Figure 1) R = 50 (RS422) (Figure 1) R = 27 or R = 50 (Figure 1)
l l l l l l l l
MIN 3.0 4.5 1.62
TYP 3.3 5.0 0 20 15
MAX 3.6 5.5 5.5 10 25 19
UNITS V V V A mA mA V V
4.7 4.7 4.8
5.0 5.0 5.0 62 250 VCC2 VCC2 VCC2 0.2 5.35
V % mA V V V V
l l l l
1.5 2
Difference in Magnitude of Driver Differential Output Voltage for Complementary Output States Driver Common Mode Output Voltage Difference in Magnitude of Driver Common Mode Output Voltage for Complementary Output States Driver Three-State (High Impedance) Output Current on Y and Z Maximum Driver Short-Circuit Current
R = 27 or R = 50 (Figure 1) R = 27 or R = 50 (Figure 1)
l l
3 0.2
V V
DE = 0V, (Y or Z) = -7V, +12V - 7V (Y or Z) 12V (Figure 2)
l l
10 - 250 96 108 125 120 156 125 -100 -0.2 25 -0.2 -0.05 0 0.4 0.67*VCC2 2 0.67*VL 0.75*VL 0.2 250
A mA k A A V mV V V V V V V
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Receiver Differential Input Threshold Voltage (A-B) Receiver Input Failsafe Hysteresis Receiver Input Failsafe Threshold
-7V B 12V B = 0V B = 0V
LTM2881
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. LTM2881-3 VCC = 3.3V, LTM2881-5 VCC = 5.0V, VL = 3.3V, GND = GND2 = 0V, ON = VL unless otherwise noted.
SYMBOL IINL VHYS VOH PARAMETER Logic Input Current Logic Input Hysteresis Output High Voltage (Note 2) Output High, ILOAD = -4mA (Sourcing), 5.5V VL 3V Output High, ILOAD = -1mA (Sourcing), 1.62V VL < 3V Output Low, ILO AD = 4mA (Sinking), 5.5V VL 3V Output High, ILOAD = 1mA (Sinking), 1.62V VL < 3V
l l l l l l
elecTrical characTerisTics
CONDITIONS
l
MIN
TYP 0 150
MAX 1
UNITS A mV V V
VL -0.4 VL -0.4 0.4 0.4 1 85
VOL
Output Low Voltage
V V A mA
IOZR IOSR
Three-State (High Impedance) Output Current RE = VL , 0V RO VL on RO Short-Circuit Current 0V (RO or DOUT) VL
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. LTM2881-3 VCC = 3.3V, LTM2881-5 VCC = 5.0V, VL = 3.3V, GND = GND2 = 0V, ON = VL unless otherwise noted.
SYMBOL fMAX tPLHD tPHLD tPD tSKEWD tRD tFD tZLD , tZHD , tLZD , tHZD fMAX tPLHD tPHLD tPD tSKEWD tRD tFD tZLD , tZHD , tLZD , tHZD PARAMETER Maximum Data Rate Driver Input to Output Driver Input to Output Difference |tPLHD - tPHLD| Driver Output Y to Output Z Driver Rise or Fall Time Driver Output Enable or Disable Time CONDITIONS (Note 3) RDIFF = 54, CL = 100pF (Figure 4) RDIFF = 54, CL = 100pF (Figure 4) RDIFF = 54, CL = 100pF (Figure 4) RDIFF = 54, CL = 100pF (Figure 4) RL = 500, CL = 50pF (Figure 5) (Note 3) RDIFF = 54, CL = 100pF (Figure 4) RDIFF = 54, CL = 100pF (Figure 4) RDIFF = 54, CL = 100pF (Figure 4) RDIFF = 54, CL = 100pF (Figure 4) RL = 500, CL = 50pF (Figure 5)
l l l l l l l
swiTching characTerisTics
Driver SLO = VCC2
MIN 20
TYP
MAX
UNITS Mbps
60 1 1 4
85 8 8 12.5 170
ns ns ns ns ns
Driver SLO = GND2 Maximum Data Rate Driver Input to Output Driver Input to Output Difference |tPLHD - tPHLD| Driver Output Y to Output Z Driver Rise or Fall Time Driver Output Enable or Disable Time 250 1 50 200 0.9 1.55 500 500 1.5 400 kbps s ns ns s ns
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LTM2881
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. LTM2881-3 VCC = 3.3V, LTM2881-5 VCC = 5.0V, VL = 3.3V, GND = GND2 = 0V, ON = VL unless otherwise noted.
SYMBOL Receiver tPLHR tPHLR tSKEWR tRR tFR tZLR , tZHR , tLZR , tHZR tRTEN , tRTZ Receiver Input to Output Differential Receiver Skew |tPLHR - tPHLR| Receiver Output Rise or Fall Time Receiver Output Enable Time Termination Enable or Disable Time CL = 15pF, VCM = 2.5V, |VAB| = 1.4V, tR and tF < 4ns, (Figure 6) CL = 15pF (Figure 6) CL = 15pF (Figure 6) RL =1k, CL = 15pF (Figure 7) RE = 0V, DE = 0V, VAB = 2V, VB = 0V (Figure 8) CL = 15pF, tR and tF < 4ns ON VL, No Load
l l l l l
swiTching characTerisTics
PARAMETER
CONDITIONS
MIN
TYP 100 1 3
MAX 140 8 12.5 50 100
UNITS ns ns ns ns s
Generic Logic Input tPLHL1 tPHLL1 DIN to DOUT Input to Output
l
60
100
ns
Power Supply Generator VCC2 -GND2 Supply Start-Up Time (0V to 4.5V)
l
325
800
s
otherwise noted.
SYMBOL VISO
isolaTion characTerisTics
PARAMETER Rated Dielectric Insulation Voltage Common Mode Transient Immunity VIORM Maximum Working Insulation Voltage Partial Discharge Input to Output Resistance Input to Output Capacitance Creepage Distance
TA = 25C, LTM2881-3 VCC = 3.3V, LTM2881-5 VCC = 5.0V, VL = 3.3V unless
MIN 2500 4400 30 560 <5 >109 6 9.48 TYP MAX UNITS VRMS VDC kV/s VPEAK pC pF mm
CONDITIONS 1 Minute (Derived from 1 Second Test) 1 Second (Note 2) (Note 2) VPR = 1050 VPEAK (Note 2) (Note 2) (Note 2) (Note 2)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Guaranteed by design and not subject to production test. Note 3: Maximum Data rate is guaranteed by other measured parameters and is not tested directly.
Note 4: This Module transceiver includes over temperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125C when over temperature protection is active. Continuous operation above specified maximum operating junction temperature may result in device degradation or failure.
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LTM2881
VCC = 5.0V, VL = 3.3V unless otherwise noted. Receiver Skew vs Temperature
2.0 1.5 RECEIVER SKEW (ns) DRIVER SKEW (ns) 1.0 0.5 0 -0.5 -1.0 -50 2.0 1.5 DRIVER PROP DELAY (ns) 1.0 0.5 0 -0.5 -1.0 -50
Typical perForMance characTerisTics
Driver Skew vs Temperature
TA = 25C, LTM2881-3 VCC = 3.3V, LTM2881-5 Driver Propagation Delay vs Temperature
80 75 70 65 60 55 50 -50
-25
0 25 50 TEMPERATURE (C)
75
100
2881 G01
-25
0 25 50 TEMPERATURE (C)
75
100
2881 G02
-25
0 25 50 TEMPERATURE (C)
75
100
2881 G03
130 128 126
RTERM vs Temperature
Driver Output Low/High Voltage vs Output Current
5.0 4.5 4.0 OUTPUT VOLTAGE (V) 3.5 3.0 2.5 2.0 1.5 1.0 0.5 OUTPUT LOW OUTPUT HIGH 6 5 OUTPUT VOLTAGE (V)
Driver Differential Output Voltage vs Temperature
RESISTANCE ( )
124 122 120 118 116 114 112 110 -50 -25 0 25 50 TEMPERATURE (C) 75 100
2881 G04
R= 4 3 2 1 0 -50 R = 100 R = 54
0
0
10
20 30 40 50 OUTPUT CURRENT (mA)
60
70
-25
0 25 50 TEMPERATURE (C)
75
100
2881 G06
2881 G05
Receiver Output Voltage vs Output Current (Source and Sink)
4 SOURCE OUTPUT VOLTAGE (V) 3 RECEIVER PROP DELAY (ns) 120 115
Receiver Propagation Delay vs Temperature
200 180 SUPPLY CURRENT (mA)
Supply Current vs Data Rate
160 R = 54 (LTM2881-3) 140 120 100 80 60 40 20 R = 100 (LTM2881-3) R = 54 (LTM2881-5) R = 100 (LTM2881-5) R = (LTM2881-3)
110 105 100 95 90 -50
2
1 SINK 0 0 1 2 3 4 OUTPUT CURRENT (mA) 5
2881 G07
-25
0 25 50 TEMPERATURE (C)
75
100
2881 G08
R = (LTM2881-5) 0 0.1 1 DATA RATE (Mbps)
10
2881 G09
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LTM2881
VCC = 5.0V, VL = 3.3V unless otherwise noted. VCC Supply Current vs Temperature at ILOAD = 100mA on VCC2
LTM2881-3 SURPLUS CURRENT (mA) 200 LTM2881-5 (RS485 60mA) VOLTAGE (V) 5 LTM2881-5
Typical perForMance characTerisTics
VCC2 Surplus Current vs Temperature
250 350 300 ICC CURRENT (mA) 250 200 150 100 50 0 -50 -25 0 25 50 TEMPERATURE (C) 75 100
2881 G10
TA = 25C, LTM2881-3 VCC = 3.3V, LTM2881-5
VCC2 vs Load Current
6
150 LTM2881-5 (RS485 90mA) LTM2881-3 (RS485 60mA)
LTM2881-5
LTM2881-3 4
100
50 LTM2881-3 (RS485 90mA) 0 -50 -25 0 25 50 TEMPERATURE (C) 75 100
2881 G11
3
2
10
20
40 60 80 100 120 140 160 180 VCC2 LOAD CURRENT (mA)
2881 G12
70 60 EFFICIENCY (%) 50 40 30 20 10
VCC2 Power Efficiency
LTM2881-5 VCC2 100mV/DIV LTM2881-3
VCC2 Load Step (100mA)
VCC2 Noise
10mV/DIV
ILOAD 50mA/DIV
100s/DIV 0 150 50 100 ICC2 OUTPUT CURRENT (mA) 200
2881 G13
2881 G14
200s/DIV
2881 G15
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LTM2881 pin FuncTions
LOGIC SIDE (VCC , VL, GND) DOUT (Pin A1): General Purpose Logic Output. Logic output connected through isolation path to DIN . Under the condition of an isolation communication failure DOUT is in a high impedance state. TE (Pin A2): Terminator Enable. A logic high enables a termination resistor (typically 120) between pins A and B. DI (Pin A3): Driver Input. If the driver outputs are enabled (DE high), then a low on DI forces the driver noninverting output (Y) low and the inverting output (Z) high. A high on DI, with the driver outputs enabled, forces the driver noninverting output (Y) high and inverting output (Z) low. DE (Pin A4): Driver Enable. A logic low disables the driver leaving the outputs Y and Z in a high impedance state. A logic high enables the driver. RE (Pin A5): Receiver Enable. A logic low enables the receiver output. A logic high disables RO to a high impedance state. RO (Pin A6): Receiver Output. If the receiver output is enabled (RE low) and if A - B is > 200mV, RO is a logic high, if A - B is < 200mV RO is a logic low. If the receiver inputs are open, shorted, or terminated without a valid signal, RO will be high. Under the condition of an isolation communication failure RO is in a high impedance state. VL (Pin A7): Logic Supply. Interface supply voltage for pins RO, RE, TE, DI, DE, DOUT, and ON. Recommended operating voltage is 1.62V to 5.5V. Internally bypassed to GND with 2.2F . ON (Pin A8): Enable. Enables power and data communication through the isolation barrier. If ON is high the part is enabled and power and communications are functional to the isolated side. If ON is low the logic side is held in reset and the isolated side is unpowered. GND (Pins B1-B5): Circuit Ground. VCC (Pins B6-B8): Supply Voltage. Recommended operating voltage is 3V to 3.6V for LTM2881-3 and 4.5V to 5.5V for LTM2881-5. Internally bypassed to GND with 2.2F . ISOLATED SIDE (VCC2, GND2) DIN (Pin L1): General Purpose Isolated Logic Input. Logic input on the isolated side relative to VCC2 and GND2. A logic high on DIN will generate a logic high on DOUT. A logic low on DIN will generate a logic low on DOUT. SLO (Pin L2): Driver Slew Rate Control. A low input, relative to GND2, will force the driver into a reduced slew rate mode for reduced EMI. A high input, relative to GND2, puts the driver into full speed mode to support maximum data rates. Y (Pin L3): Non Inverting Driver Output. High impedance when the driver is disabled. Z (Pin L4): Inverting Driver Output. High impedance when the driver is disabled. B (Pin L5): Inverting Receiver Input. Impedance is > 96k in receive mode with TE low or unpowered. A (Pin L6): Non Inverting Receiver Input. Impedance is > 96k in receive mode with TE low or unpowered. VCC2 (Pins L7-L8): Isolated Supply Voltage. Internally generated from VCC by an isolated DC/DC converter and regulated to 5V. Internally bypassed to GND2 with 2.2F . GND2 (Pins K1-K8): Isolated Side Circuit Ground. The pads should be connected to the isolated ground and/or cable shield.
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LTM2881 block DiagraM
VCC 2.2F ISOLATED DC/DC CONVERTER VL 2.2F RO RX RE DE DI ON TE DOUT DX ISOLATED COMM INTERFACE ISOLATED COMM INTERFACE 120 A B 5V REG VCC2 2.2F
Y Z SLO DIN
GND = LOGIC SIDE COMMON
GND2
2881 BD
= ISOLATED SIDE COMMON
TesT circuiTs
Y GND OR VL DI Y DRIVER VOD
+
R R
-
Z
VOC
+ -
GND OR VL
DI
IOSD DRIVER
Z
+ -
2881 F02
-7V TO 12V
2881 F01
Figure 1. Driver DC Characteristics
IIN
Figure 2. Driver Output Short-Circuit Current
A OR B RECEIVER
VIN
+ -
B OR A
2881 F03
V RIN = IN IIN
Figure 3. Receiver Input Current and Input Resistance
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LTM2881 TesT circuiTs
Y DI CL DRIVER RDIFF CL Z
2881 F04a
DI
VL 0V
tPLHD tSKEWD
tPHLD
Y, Z VOD
1/2 VOD
(Y-Z)
90% 10%
0 tRD
0
90% 10% tFD
2881 F04b
Figure 4. Driver Timing Measurement
VL 0V VCC2 Y OR Z RL Z CL VCC2 OR GND
2881 F05a
Y VL OR GND DI CL DRIVER DE
RL
GND OR VCC2
DE
1/2 VL tZLD 1/2 VCC2 tLZD 0.5V 0.5V tHZD
2881 F05b
Z OR Y 0V tZHD
1/2 VCC2
Figure 5. Driver Enable and Disable Timing Measurements
tR A RECEIVER RO CL
2881 F06a
tF 90% 10% tPLHR tPHLR 1/2 VL 90% 10% tFR
2881 F06b
VAB/2 VCM VAB/2
VAB A-B -VAB VL 0
90% 10%
0
B
RO
90% 1/2 VL 10% tRR
Figure 6. Receiver Propagation Delay Measurements
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0
LTM2881 TesT circuiTs
RE 0V OR VCC2 VCC2 OR 0V A RECEIVER RE RO RL CL VL OR GND RO VL 0V VL VOL RO
2881 F07a
1/2 VL tZLR 1/2 VL tLZR 0.5V 0.5V
2881 F07b
B
VOH 0V tZHR
1/2 VL tHZR
Figure 7. Receiver Enable/Disable Time Measurements
IA RO A RECEIVER VAB IA TE VAB IA VL 1/2 VL 0V 90% tRTEN tRTZ 10%
RTE =
+ - + -
B TE
VB
2881 F08
Figure 8. Termination Resistance and Timing Measurements
FuncTional Table
LOGIC INPUTS ON 1 1 1 1 0 RE 0 0 1 0 X TE 0 0 0 1 X DE 0 1 1 0 X Receive Transceiver Transmit Receive + Term On Off RIN RIN RIN RTE RIN Hi-Z Driven Driven Hi-Z Hi-Z Enabled Enabled Hi-Z Enabled Hi-Z On On On On Off Off Off Off On Off MODE A, B Y, Z RO DC/DC CONVERTER TERMINATOR
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LTM2881 applicaTions inForMaTion
Overview The LTM2881 Module transceiver provides a galvanically-isolated robust RS485/RS422 interface, powered by an integrated, regulated DC/DC converter, complete with decoupling capacitors. A switchable termination resistor is integrated at the receiver input to provide proper termination to the RS485 bus. The LTM2881 is ideal for use in networks where grounds can take on different voltages. Isolation in the LTM2881 blocks high voltage differences and eliminates ground loops and is extremely tolerant of common mode transients between ground potentials. Error free operation is maintained through common mode events greater than 30kV/s providing excellent noise isolation. Module Technology The LTM2881 utilizes isolator Module technology to translate signals and power across an isolation barrier. Signals on either side of the barrier are encoded into pulses and translated across the isolation boundary using coreless transformers formed in the Module substrate. This system, complete with data refresh, error checking, safe shutdown on fail, and extremely high common mode immunity, provides a robust solution for bidirectional signal isolation. The Module technology provides the means to combine the isolated signaling with our RS485 transceiver and powerful isolated DC/DC converter in one small package. DC/DC Converter The LTM2881 contains a fully integrated isolated DC/DC converter, including the transformer, so that no external components are necessary. The logic side contains a fullbridge driver, running about 2MHz, and is AC-coupled to a single transformer primary. A series DC blocking capacitor prevents transformer saturation due to driver duty cycle imbalance. The transformer scales the primary voltage, and is rectified by a full-wave voltage doubler. This topology eliminates transformer saturation caused by secondary imbalances. The DC/DC converter is connected to a low dropout regulator (LDO) to provide a regulated low noise 5V output. The internal power solution is sufficient to support the transceiver interface at its maximum specified load and data rate, and external pins are supplied for extra decoupling (optional) and heat dissipation. The logic supplies, VCC and VL have a 2.2F decoupling capacitance to GND and the isolated supply VCC2 has a 2.2F decoupling capacitance to GND2 within the Module package. VCC2 Output The on-board DC/DC converter provides isolated 5V power to output VCC2. VCC2 is capable of suppling up to 1W of power at 5V in the LTM2881-5 option and up to 600mW of power in the LTM2881-3 option. This surplus current is available to external applications. The amount of surplus current is dependent upon the implementation and current delivered to the RS485 driver and line load. An example of available surplus current is shown in the Typical Performance Characteristics graph, VCC2 Surplus Current vs Temperature. Figure 19 demonstrates a method of using the VCC2 output directly and with a switched power path that is controlled with the isolated RS485 data channel. Driver The driver provides full RS485 and RS422 compatibility. When enabled, if DI is high, Y-Z is positive. When the driver is disabled, both outputs are high impedance with less than 10A of leakage current over the entire common mode range of -7V to 12V, with respect to GND2. Driver Overvoltage and Overcurrent Protection The driver outputs are protected from short circuits to any voltage within the absolute maximum range of (VCC2 -15V) to (GND2 +15V) levels. The maximum VCC2 current in this condition is 250mA. If the pin voltage exceeds about 10V, current limit folds back to about half of the peak value to reduce overall power dissipation and avoid damaging the part. The device also features thermal shutdown protection that disables the driver and receiver output in case of excessive power dissipation (See Note 4 in the Electrical Characteristics section).
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LTM2881 applicaTions inForMaTion
Y-Z 10dB/DIV
Y-Z 10dB/DIV 0
0
6.25 FREQUENCY (MHz)
12.5
2881 F09a
6.25 FREQUENCY (MHz)
12.5
2881 F09b
Figure 9a. Frequency Spectrum SLO Mode 125kHz Input
Figure 9b. Normal Mode Frequency Spectrum 125kHz Input
SLO Mode The LTM2881 features a logic-selectable reduced slew rate mode (SLO mode) that softens the driver output edges to reduce EMI emissions from equipment and data cables. The reduced slew rate mode is entered by taking the SLO pin low to GND2, where the data rate is limited to about 250kbps. Slew limiting also mitigates the adverse effects of imperfect transmission line termination caused by stubs or mismatched cables. Figures 9a and 9b show the frequency spectrums of the LTM2881 driver outputs in normal and SLO mode operating at 250kbps. SLO mode significantly reduces the high frequency harmonics. Receiver and Failsafe With the receiver enabled, when the absolute value of the differential voltage between the A and B pins is greater than 200mV, the state of RO will reflect the polarity of (AB). During data communication the receiver detects the state of the input with symmetric thresholds around 0V. The symmetric thresholds preserve duty cycle for attenuated signals with slow transition rates on high capacitive busses, or long cable lengths. The receiver incorporates a failsafe feature that guarantees the receiver output to be a logic-high during an idle bus, when the inputs are shorted, left open or terminated, but not driven. The failsafe feature eliminates the need for system level integration of network pre-biasing by guaranteeing a logic-high on RO under the conditions of an idle bus. Further network biasing constructed to condition transient noise during an idle
state is unnecessary due to the common mode transient rejection of the LTM2881. The failsafe detector monitors A and B in parallel with the receiver and detects the state of the bus when A-B is above the input failsafe threshold for longer than about 3s with a hysteresis of 25mV. This failsafe feature is guaranteed to work for inputs spanning the entire common mode range of -7V to 12V. The receiver output is internally driven high (to VL) or low (to GND) with no external pull-up needed. When the receiver is disabled the RO pin becomes Hi-Z with leakage of less than 1A for voltages within the supply range. Receiver Input Resistance The receiver input resistance from A or B to GND2 is greater than 96k permitting up to a total of 256 receivers per system without exceeding the RS485 receiver loading specification. The input resistance of the receiver is unaffected by enabling/disabling the receiver or by powering/unpowering the part. The equivalent input resistance looking into A and B is shown in Figure 10.
>96k 60 A
TE 60
2881 F10
>96k
B
Figure 10. Equivalent Input Resistance into A and B
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LTM2881 applicaTions inForMaTion
Switchable Termination Proper cable termination is very important for signal fidelity. If the cable is not terminated with its characteristic impedance, reflections will distort the signal waveforms. The integrated switchable termination resistor provides logic control of the line termination for optimal performance when configuring transceiver networks. When the TE pin is high, the termination resistor is enabled and the differential resistance from A to B is 120. Figure 11 shows the I/V characteristics between pins A and B with the termination resistor enabled and disabled. The resistance is maintained over the entire RS485 common mode range of -7V to 12V as shown in Figure 12. The integrated termination resistor has a high frequency response which does not limit performance at the maximum specified data rate. Figure 13 shows the magnitude and phase of the termination impedance versus frequency. The termination resistor cannot be enabled by TE if the device is unpowered, ON is low or the LTM2881 is in thermal shutdown. Supply Current The static supply current is dominated by power delivered to the termination resistance. Power supply current increases with data rate due to capacitive loading. Figure 14 shows supply current versus data rate for three different loads for the circuit configuration of Figure 4. Supply current increases with additional external applications drawing current from VCC2.
130 128 126 RESISTANCE ( ) 124 122 120 118 116 114 112 110 -10
2881 F11
-5 0 5 10 COMMON MODE VOLTAGE (V)
15
2881 G11
Figure 11. Curve Trace Between A and B with Termination Enabled and Disabled
Figure 12. Termination Resistance vs Common Mode Voltage
150 PHASE
10
250 230
140 MAGNITUDE ( )
0 SUPPLY CURRENT (mA) PHASE (DEGREES)
210 190 170 150 130 110 90 70 50
130 120 MAGNITUDE
-10 -20
LTM2881-3 R=54 CL=1000p R=54 CL=100p R=54 CL=0 LTM2881-5 R=54 CL=1000p R=54 CL=100p R=54 CL=0
110 100 0.1
-30 -40
1 FREQUENCY (MHz)
10
2881 F13
0.1
1 DATA RATE (Mbps)
10
2881 F14
Figure 13. Termination Magnitude and Phase vs Frequency
Figure 14. Supply Current vs Data Rate
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LTM2881 applicaTions inForMaTion
PCB Layout Considerations The high integration of the LTM2881 makes PCB layout very simple. However, to optimize its electrical isolation characteristics, EMI, and thermal performance, some layout considerations are necessary. The PCB layout in Figure 15 shows a recommended configuration for a low EMI RS485 application. * Under heavily loaded conditions, VCC and GND current can exceed 300mA. Use sufficient copper on the PCB to ensure resistive losses do not cause the supply voltage to drop below the minimum allowed level. Similarly, size the VCC2 and GND2 conductors to support any external load current. These heavy copper traces will also help to reduce thermal stress and improve the thermal conductivity. * Input and Output decoupling is not required, since these components are integrated within the package. If an additional decoupling capacitor is used a value of 6.8F to 22F is recommended. The recommendation for EMI sensitive applications is to include an additional low ESL ceramic capacitor of 1F to 4.7F placed close , to the power and ground terminals. Alternatively, use a number of smaller value parallel capacitors to reduce ESL and achieve the same net capacitance. * Hot plugging the LTM2881 voltage supply without additional protection may cause device damage. Refer to Linear Technology Application Note 88, entitled "Ceramic Capacitors Can Cause Overvoltage Transients" for a detailed discussion of this problem. To protect against hot plug transients use a 6.8F tantalum as the additional decoupling capacitor. * Do not place copper on the PCB between the inner columns of pads. This area must remain open to withstand the rated isolation voltage. Slot the PCB in this area to facilitate cleaning and ensure contamination does not compromise the isolation voltage. * The recommendation for non-EMI critical applications is to use solid ground planes for GND and GND2 for optimizing signal fidelity, thermal performance, and to minimize RF emissions due to uncoupled PCB trace conduction. The drawback of using ground planes, where EMI is of concern, is the creation of a dipole antenna structure, which can radiate differential voltages formed between GND and GND2. If ground planes are used, minimize their area, and use contiguous planes, any openings or splits can increase RF emissions. * For large ground planes a small capacitance ( 330pF) from GND to GND2, either discrete or embedded within the substrate, provides a low impedance current return path for the module parasitic capacitance, minimizing any high frequency differential voltages and substantially reducing radiated emissions. Discrete capacitance is not as effective due to parasitic ESL; in addition consider voltage rating, leakage, and clearance for component selection. Embedding the capacitance within the PCB substrate provides a near ideal capacitor and eliminates the other component selection issues, however the PCB must be 4 layers and the use of a slot is not compatible. Exercise care in applying either technique to insure the voltage rating of the barrier is not compromised.
VCC = VL = ON RO
C1
A SLOT B Z Y
RE DE DI TE
GND
SLOT
2881 F15
Figure 15. PCB Recommended Layout
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LTM2881 applicaTions inForMaTion
Cable Length versus Data Rate For a given data rate, the maximum transmission distance is bounded by the cable properties. A typical curve of cable length versus data rate compliant with the RS485 standard is shown in Figure 16. Three regions of this curve reflect different performance limiting factors in data transmission. In the flat region of the curve, maximum distance is determined by resistive loss in the cable. The downward sloping region represents limits in distance and rate due to the AC losses in the cable. The solid vertical line represents the specified maximum data rate in the RS485 standard. The dashed line at 250kbps shows the maximum data rate when SLO is low. The dashed line at 20Mbps shows the maximum data rate when SLO is high.
10k
RF Magnetic Field Immunity , The LTM2881 has been independently evaluated and has successfully passed the RF and magnetic field immunity testing requirements per European Standard EN 55024, in accordance with the following test standards: EN 61000-4-3 Radiated, Radio-Frequency, Electromagnetic Field Immunity EN 61000-4-8 Power Frequency Magnetic Field Immunity EN 61000-4-9 Pulsed Magnetic Field Immunity Tests were performed using an unshielded test card designed per the data sheet PCB layout recommendations. Specific limits per test are detailed in Table 1.
Table 1. Test Frequency Field Strength
EN 61000-4-3, Annex D 80MHz to 1GHz 1.4MHz to 2GHz 2GHz to 2.7GHz EN61000-4-8, Level 4 50Hz and 60Hz
NORMAL MODE MAX DATA RATE
CABLE LENGTH (FT)
1k
LOW-EMI MODE MAX DATA RATE
10V/m 3V/m 1V/m 30A/m 100A/m* 1000A/m
EN61000-4-8, Level 5 60Hz EN61000-4-9, Level 5 Pulse *Non IEC Method
100 RS485 MAX DATA RATE 10 10k 100k
1M 10M DATA RATE (bps)
100M
2881 F16
Figure 16. Cable Length vs Data Rate
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LTM2881 Typical applicaTions
VCC VCC LTM2881 A ISOLATION BARRIER B
VL RO RE TE DE DI 330k FAULT
Y Z DIN GND2
2881 F17
DOUT GND
Figure 17. Isolated System Fault Detection
VCC
VCC VL ISOLATION BARRIER RO RE TE DE DI GND PWR
LTM2881 A B
Y Z GND2
2881 F18
Figure 18. Full-Duplex RS485 Connection
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LTM2881 Typical applicaTions
VCC 1.8V VL RO RE TE DE OFF ON CMOS OUTPUT DI DOUT GND GND2
2881 F19
VCC ISOLATION BARRIER
PWR
VCC2 A B
REGULATED 5V SWITCHED 5V IRLML6402
LTM2881
330k
Z DIN CMOS INPUT
Figure 19. Switched 5V Power with Isolated CMOS Logic Connection with Low Voltage Interface
VCC
VCCB
VCC VL ISOLATION BARRIER RO RE PWR
LTM2881 A B 10nF 51 51
LTM2881 Y
PWR ISOLATION BARRIER
VCC
VL DE DI
Z
DE DI GND
Y Z GND2
51 51 10nF
A B GND2 BUS INHERITED
RE RO GND
2881 F20
B
Figure 20. 4-Wire Full Duplex Self Biasing for Unshielded CAT5 Connection
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BGA Package 32-Lead (15mm x 11.25mm x 3.42mm)
(Reference LTC DWG #05-08-1851 Rev B)
DETAIL A
8
PIN 1 A aaa Z A2 Z
7 A
6
5
4
3
2
1
PIN "A1" CORNER A1 b
B C D
4 ccc Z
MOLD CAP D SUBSTRATE 0.27 - 0.37 2.45 - 2.55 F
b1
E F G H
package DescripTion
// bbb Z
DETAIL B
J K
e
L
Ob (32 PLACES) X Y ddd M Z X Y eee M Z b G e SEE NOTES 3
E
aaa Z
PACKAGE TOP VIEW
DETAIL B PACKAGE SIDE VIEW
PACKAGE BOTTOM VIEW
0.000
4.445
3.175
1.905
0.635
0.635
1.905
3.175
4.445
DETAIL A
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. ALL DIMENSIONS ARE IN MILLIMETERS 3 NOTES 4 BALL DESIGNATION PER JESD MS-028 AND JEP95 DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE MAX 3.62 0.70 2.92 0.83 0.66 5. PRIMARY DATUM -Z- IS SEATING PLANE
0.630 0.025 O 32x 5.080
6.350
DIMENSIONS MIN 3.22 0.50 2.72 0.73 0.60
0.000
NOM 3.42 0.60 2.82 0.78 0.63 15.0 11.25 1.27 12.70 8.89
5.080 6.350
COMPONENT PIN "A1"
LTMXXXXXX Module
SYMBOL A A1 A2 b b1 D E e F G aaa bbb ccc ddd eee 0.15 0.10 0.20 0.30 0.15
TRAY PIN 1 BEVEL
LTM2881
SUGGESTED PCB LAYOUT TOP VIEW
TOTAL NUMBER OF BALLS: 32
PACKAGE IN TRAY LOADING ORIENTATION
BGA 32 0110 REV B
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LGA Package 32-Lead (15mm x 11.25mm x 2.8mm)
(Reference LTC DWG # 05-08-1773 Rev q)
DETAIL A 2.69 - 2.95 aaa Z
LTM2881
package DescripTion
bbb Z
Z
aaa Z
4.445
3.175
1.905
0.635
0.635
1.905
3.175
4.445
0
8 7
PAD 1
6 A B C D E
5
4
3
2
1
PAD "A1" CORNER
4
15.00 BSC MOLD CAP SUBSTRATE 0.290 - 0.350 2.400 - 2.600 DETAIL B
12.70 BSC
F G H J K L
X Y DETAIL B 0.630 0.025 O 32x eee S X Y eee S X Y 0.630 0.025 O 32x 8.89 BSC
11.25 BSC
1.27 BSC
PADS SEE NOTES 3
PACKAGE TOP VIEW
PACKAGE BOTTOM VIEW
DETAIL c DETAIL A DETAIL C
6.350 5.080
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. ALL DIMENSIONS ARE IN MILLIMETERS 3 4 LAND DESIGNATION PER JESD MO-222 DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE
0.000
5. PRIMARY DATUM -Z- IS SEATING PLANE 6. THE TOTAL NUMBER OF PADS: 32
5.080 6.350
COMPONENT PIN "A1"
LTMXXXXXX Module
TRAY PIN 1 BEVEL
PACKAGE IN TRAY LOADING ORIENTATION
LGA 32 0308 REV O
SYMBOL TOLERANCE aaa 0.10 bbb 0.10 eee 0.05
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SUGGESTED PCB LAYOUT TOP VIEW
LTM2881 revision hisTory
REV A DATE 3/10 DESCRIPTION Changes to Features, Description and Typical Application Add BGA Package to Pin Configuration, Order Information and Package Description Sections Changes to LGA Package in Pin Configuration Section Changes to Electrical Characteristics Section Changes to Graphs G09, G13, G14 Update to Pin Functions Update to Applications Information Change to X-Axis on Figures 9a and 9b Update to Supply Current Section "PCB Layout Isolation Considerations" Section Replaced RF Magnetic Field Immunity Section Added , Changes to Related Parts PAGE NUMBER 1 2, 19 2 3 6, 7 8 12 13 14 15 16 22
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTM2881 Typical applicaTion
VCCC VCCA VCC VL ISOLATION BARRIER RO RE TE DE DI GND A PWR LTM2881 A B CABLE SHIELD OR GROUND RETURN Y Z GND2 A B Y Z Y Z GND2 GND C LTM2881 A B PWR ISOLATION BARRIER VCC VL RO RE TE DE DI
VCC1
VCC2
ISOLATION BARRIER LTM2881 VCCB VCC GND RO RE DE TE VL DI
GND2
PWR
2881 F21
B
B
Figure 21. Multi-Node Network with End Termination and Single Ground Connection on Isolation Bus
relaTeD parTs
PART NUMBER LTM2882 LTC1535 LT1785 LT1791 LTC2861 DESCRIPTION Dual Isolated RS232 Module Transceiver + Power Isolated RS485 Transceiver 60V Fault-Protected Transceiver 60V Fault-Protected Transceiver 20Mbps RS485 Transceivers with Integrated Switchable Termination COMMENTS 1Mbps, 10kV HBM ESD, 2500VRMS 2500VRMS Isolation in Surface Mount Package Half Duplex Full Duplex Full Duplex 15kV ESD
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507
LT 0310 REV A * PRINTED IN USA
www.linear.com
LINEAR TECHNOLOGY CORPORATION 2009


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